COMPUTER- SYSTEM STRUCTURES

COMPUTER-SYSTEM STRUCTURES

  • Computer-System Operation
  • I/O Structure
  • Storage Structure
  • Storage Hierarchy
  • Hardware Protection
  • General System Architecture

Computer-System Operation

  • I/O devices and the CPU can operate concurrently.
  • Each device controller is in charge of a particular device type.
  • Each device controller has a local buffer.
  • CPU moves data from/to main memory to/from the local buffers.
  • I/O is from the device to local buffer of controller.
  • Device controller informs CPU that it has finished its operation by causing an interrupt.

Interrupts

Types

  1. Hardware - Asynchronous
    Device informs CPU that something has happened e.g. a key has been pressed on the keyboard.
  2. Hardware - Synchronous
    CPU has tried to do something that has caused the interrupt. e.g. tried to read from an invalid memory location. (not always a problem, it may mean that that page is on disk needs to be fetched). Often called an Exception or Trap.
  3. Software
    CPU asked for the interrupt to happen. e.g. to perform an OS Call. Often called a Trap.

Hardware Interrupts

  • I/O devices use Asynchronous Hardware Interrupts (i.e. caused by outside world and may happen at any time).
  • Transfers control to the interrupt service routine, through the interrupt vector, which contains the addresses of all the service routines.
  • CPU must save the address of the interrupted instruction.

Interrupt Handling

  • Interrupt handling is a very important part of the OS.
  • The operating system must preserve the state of the CPU by storing all registers.
  • Determine which type of interrupt has occurred:
    • polling - ask each device if it caused the interrupt.
    • vectored interrupt system - device identifies itself when it causes the interrupt.
  • Separate segments of code determine what action should be taken for each type of interrupt.

I/O Calls

Blocking I/O

  • User program requests I/O, control returns to user program only upon I/O completion.
    • CPU may be allocated to another process.

Non-Blocking I/O

  • After I/O starts, control returns to user program without waiting for I/O completion.

Direct Memory Access (DMA) Structure

  • Used for high-speed I/O devices able to transmit information at close to memory speeds.
  • Device controller transfers blocks of data from buffer storage directly to main memory without CPU intervention.
  • Only one interrupt is generated per block, rather than the one interrupt per byte.

Storage Structure

  • Main memory - only large storage media that the CPU can access directly.
  • Secondary storage - extension of main memory that provides large non-volatile storage capacity.
  • Magnetic disks
    • Disk surface is logically divided into tracks, which are subdivided into sectors.
    • The disk controller determines the logical interaction between the device and the computer.

Storage Hierarchy

  • Storage systems can be organized in a hierarchy:
    • speed
    • cost
    • volatility
  • Most programs make accesses to memory which are localised
    • in time
      i.e. the program spends a lot of time executing short sections of code.
    • in space
      i.e. the program reads and writes to certain memory locations a lot; these locations tend to be close together.
  • Caching - copying information into faster storage system; main memory can be viewed as a fast cache for secondary memory.

Hardware Protection

  • Dual-Mode Operation
  • I/O Protection
  • Memory Protection
  • CPU Protection

Dual-Mode Operation

  • Sharing system resources requires operating system to ensure that an incorrect program cannot cause other programs to execute incorrectly.
  • Provide hardware support to differentiate between at least two modes of operations.
  • User mode
    - execution done on behalf of a user.
  • Monitor mode (also supervisor mode or system mode)
    - execution done on behalf of operating system.
  • Mode bit added to computer hardware (in CPU flags) to indicate the current mode: monitor (0) or user (1).
  • When an interrupt or fault occurs hardware switches to monitor mode

  • Certain Privileged instructions can be issued only in monitor mode.
  • Some CPUs have more complex protection mechanisms with many levels of protection (sometimes called rings).

I/O Protection

  • All I/O instructions are privileged instructions.
  • Must ensure that a user program could never gain control of the computer in monitor mode

Memory Protection

  • Must provide memory protection at least for the interrupt vector and the interrupt service routines.
  • In order to have memory protection, add two registers that determine the range of legal addresses a program may access:
    • base register - holds the smallest legal physical memory address.
    • limit register - contains the size of the range.
  • Memory outside the defined range is protected.

  • Protection hardware

  • When executing in monitor mode, the operating system has unrestricted access to both monitor and users' memory.
  • The load instructions for the base and limit registers are privileged instructions.
  • In practice, memory protection is much more complicated than this. A device called a Memory Management Unit (MMU) controls access to memory.

CPU Protection - how does the OS stay in control.

  • Timer - interrupts computer after specified period to ensure operating system maintains control.
    • Timer is decremented every clock tick.
    • When timer reaches the value 0, an interrupt occurs.
  • Timer used to implement multiprogramming.
  • Timer also used to compute the current time.
  • Load-timer is a privileged instruction.
  • User programs can not disable interrupts.

General-System Architecture

  • Given that I/O instructions are privileged, how does the user program perform I/O?
  • System call - the method used by a process to request action by the operating system.
    • Usually takes the form of a trap (software interrupt).
    • Control passes through an interrupt vector to a service routine in the OS, and the mode bit is automatically set to supervisor mode.
    • The OS verifies that the parameters are correct and legal, executes the request, and returns control to the instruction following the system call.